Projects

Real-Time Sign Language Translation

FPGA-accelerated embedded system for real-time ASL recognition with optimized CNN inference.

12ms Inference Latency
80 FPS Processing Speed
15% DSP Usage
33% LUT Usage

System Architecture

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Project Presentation

                

                    

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Technical Highlights

                

                    

                        
HW/SW Co-Design

                        
Offloaded CNN inference from Raspberry Pi to FPGA accelerator for latency optimization

                    

                    

                        
Optimized HLS

                        
Custom Vivado HLS modules for CNN layers with minimized resource usage

                    

                    

                        
Real-Time Pipeline

                        
Camera input to translation output in under 12ms end-to-end

                    

                    

                        
Resource Efficient

                        
Achieved target performance using only 15% DSP and 33% LUT resources

                    

                

            


            
            

                
Built With

                

                    FPGA
                    Vivado HLS
                    C++
                    Raspberry Pi
                    Python
                

            

        

        © Neil Rayu